Digital Design Engineer

Digital Design Engineer

Boston, USA | Full-time | Permanent | Hybrid

Salary : $90,000 - $135,000 USD (DOE) + bonus plan + equity

Riverlane's mission is to make quantum computing useful, sooner. From advances in material science to complex chemistry simulation for drug design and discovery, quantum computers will help solve some of the world's most important challenges. Riverlane is building the quantum error correction stack, Deltaflow, to make this happen. It's a complex problem that requires a range of skills, talent and passion.

We recently raised $75M to accelerate our cutting-edge R&D in quantum error correction (QEC), and are partnering with many of the world's leading quantum hardware providers and government agencies to make fault-tolerant quantum computing a reality. We're making remarkable progress and growing fast.

About the role

We have a fantastic opportunity for a Digital Design Engineer to join us, as we build the world's first quantum error correction (QEC) stack. Don't have a background in quantum computing? Not a problem! This cutting-edge technology requires a wide range of skills and disciplines, including classical computing skills. You will learn quantum computing along the way.

As a Digital Design Engineer at Riverlane, you will help develop a multi-FPGA, low-latency, high throughput system that needs to perform complex operations, in a predictable and guaranteed way.

Our mission is exciting, but complex. It requires teams with a wide range of skills and perspectives, that communicate well and collaborate effectively to achieve truly innovative solutions.

You will thrive in an environment where knowledge sharing and continuous learning are the norm. We are moving fast in a brand new market, where requirements can change as the technology evolves, so the ability to adapt is important.

What you will do

As a Digital Design Engineer at Riverlane, you will work on one of these key areas :

• Implementation of QEC decoders on hardware
• Implementation of low-latency, high throughput data movement between cards and IPs
• Design of low-latency interfaces to bring data in the systems

In all of the above, you will (often from scratch) design or integrate complex IPs and develop tests, collaborating closely with our software, verification and testing experts to deliver an outstanding product.