Senior Design Lead

Job Description

Job Description

Description : Senior Design Lead

Design SLT (System Level Testing) Bench-Level Printed Circuit Boards for Wafer and

Package Level testing of Google Mobile SOC Integrated Circuits (IC) used for Phone

Tablets. Design High complex ATE Printed Circuit Boards for Wafer and Package

Level testing of Texas Instruments’ Integrated Circuits (IC). Design Evaluation Module

EVM) Printed Circuit Boards for Texas Instruments and Google. Perform Signal

Integrity simulation for High-speed Interfaces. Prepare various PCB stack-ups based on

new manufacturing technologies using dielectric materials, laser and mechanical drills

and HDI technologies using sequential and multi laminations. Generate Bill of

Materials (List of Components, Hardware Kit Mechanicals etc. loaded on a PCB)

using ‘BOM Generation Tool’. Resolve questions from PCB Fab and Assembly

vendors related to PCB Manufacturing. Review RFQ inputs, estimate design effort

required, and work with PCB Fab and Assembly partners to arrive at Price and Lead

time. Debug issues with hardware and support hardware brought up on the ATE

equipment. Use technologies such as Schematic EDA Tools (Orcad, ConceptHDL, and

Altium), PCB EDA Tools (Allegro, and Altium), Design Workbench (ADW 17.2, and

EDM 17.4), Gerber Verification Tool (CAM 350), Test boards Design Procedure and

Specification, EVM Design Procedure Checklist Training, High Speed Design

Guidelines and Signal Integrity Basics, ATE Loadboard Checker Program

Development, Test Hardware Bring-up and Debug Training, and Ultra Flex Tester

guidelines and Specification.

Require Bachelor of Science in computer science / engineering, information

systems / technology, electrical / electronics / communication engineering, or related field

and 5 years’ experience in the job offered, design engineer / lead, product / circuit design

engineer, IC design engineer, or related field.

5 years employment experience to include the following experience :

Silicon / Consumer hardware validation (semiconductor),

Familiarity with Linux OS,

Experience with functional test at low (eg : LK) High Level OS (eg : Android),

Experience with Python scripting,

Automation (Lab Equipment, Handlers, ATE) and Scripting (Data manipulation, parsing, Plotting),

Schematic / Layout reading,

Board level hardware debugging,

Prototyping / Soldering experience, and

Python or LabView or VB.

Please mail your resume to Tezerakt, LLC., 333 W San Carlos Street, Suite 600, San Jose, CA

95110

Requirements :