Physical Design Engineer

Job Description

We are seeking an experienced and highly skilled Block-Level Design Engineer to join our innovative team. The ideal candidate will excel in RTL-to-GDSII design processes and demonstrate expertise in advanced implementation tools and techniques. This role offers an opportunity to work on cutting-edge designs for lower nodes (3nm, 4nm, 5nm).

Key Responsibilities

• Perform block-level design from RTL-to-GDSII.
• Handle synthesis, floor-planning, place & route, timing / EMIR / PV closure, and signoff.
• Utilize the Cadence Implementation tool suite (Genus, Innovus) proficiently.
• Implement controllers for High-Speed IO IPs.
• Conduct structural implementation, including datapaths, bus planning, and routing.
• Design with multi-power domains.
• Develop and maintain scripts using TCL and Python.

Requirements

Seniority level

Mid-Senior level

Employment type

Full-time

Job function

Engineering and Information Technology

Industries

Semiconductor Manufacturing

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