Senior Memory Design Engineer

Rivos Custom Circuits team is seeking highly motivated candidates to develop state of the art custom SRAM memories, Register file memories, and compiled memories to improve circuit performance, optimize dynamic and static power and support silicon bring up. The role will be at the center of a state-of-the art circuit design effort, interfacing with all disciplines and have a critical impact on getting products to market quickly. The qualified candidate will be responsible for designing and delivering custom circuits from scratch. Candidates must have 8-10 years of experience in transistor level circuit design, circuit simulation, equivalence checking, PPA trade off analysis, low power design techniques, timing, noise and power characterization.

Key Qualifications

• The ideal candidate will have 12-15 years of custom circuit design experience from RTL-GDS for CPU and SoC applications
• Prior experience and proven success of successfully designing high performance SRAM memories, Register file memories, SRAM compilers, data path designs and standard cells
• Experience designing transistor-level custom circuits in advanced FinFET technology nodes
• Must have a solid experience with the custom circuit tool flows for delivering design collaterals
• A solid understanding of device physics, process technology and circuit design techniques for high performance, low power, and power gating
• Experience with advanced process design rules and supervising mask design
• Knowledge developing automation for compilers and standard cells
• Post-Silicon test and debug experience
• Ability to work well in a team and be productive under aggressive schedules.
• Excellent problem solving, written and verbal communication

Responsibilities

Education and Experience