System Validation EngineerCynet Systems • Santa Clara, CA
System Validation Engineer
Cynet Systems • Santa Clara, CA
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job_description.job_card.job_descriptionProven expertise in DDR3 / DDR4 memory bring-up, margining, and characterization. Hands-on experience with diagnostic tools and methodologies for qualifying different DIMMs. Strong scripting skills in C and Python for test automation and data analysis. Familiarity with signal integrity concepts, eye diagrams, and margining techniques. Experience with embedded instrumentation, BIST, or boundary scan (JTAG) is a plus. Ability to interpret and analyze statistical margining data. Excellent problem-solving and communication skills.
Job Description :
Pay Range : $65hr - $70hr
Responsibilities :
- Execute DDR3 / DDR4 memory bring-up and system marginality validation (SMV) on new hardware platforms.
- Perform diagnostic testing, margining, and qualification of various DIMMs, ensuring robust signal integrity and system reliability under different process, voltage, and temperature (PVT) conditions.
- Develop and run test patterns and margining routines (e.g., PRBS, worst-case patterns) to identify and resolve marginalities and defects.
- Analyze margin plots, eye diagrams, and statistical data to assess system performance and identify root causes of failures.
- Collaborate with hardware, firmware, and validation teams to optimize memory subsystem performance and resolve issues.
- Automate test procedures and data analysis using C and Python scripting.
- Document test methodologies, results, and recommendations for design and manufacturing improvements.
Required Skills And Experience :
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