Eximietas Design is a leading technology consulting and solutions development firm specializing in VLSI, Cloud Computing, Cyber Security, and AI / ML. Our engineering leadership team brings decades of experience from top-tier semiconductor and technology companies. With a deep commitment to innovation and excellence, we deliver cutting‑edge solutions that help businesses thrive in today's rapidly evolving digital landscape.
Location : Bay Area, CA (Other locations can be discussed)
Employment Type : Full‑Time
Minimum Qualifications
Bachelor’s degree in Computer Science or Electrical / Electronics Engineering
10+ years of Design Verification experience
Strong understanding of design concepts and ASIC verification flows
Proven background in IP, Subsystem, and SoC verification
Hands‑on expertise with high‑speed interface protocols, with expertise in one or more of the following subskill domains :
Ethernet
mCPU / CPU Subsystems
Proficient in SystemVerilog and UVM
Practical experience integrating and debugging third‑party VIPs
Strong analytical, debugging, and problem‑solving skills
Demonstrated capability in Subsystem testbench development and SoC‑level DV
Strong knowledge of AMBA protocols (AXI, APB, AHB)
Experience with version control systems (Git / Perforce / SVN)
Responsibilities
Develop or enhance UVM testbench components (Driver, Monitor, Scoreboard) for IP, Subsystem, or SoC
Understand design specifications to define verification strategy and architecture
Create testbench micro‑architecture, detailed test plans, and coverage plans
Build DV infrastructure, develop tests, and ensure complete verification coverage
Implement SystemVerilog Assertions (SVA) and functional coverage
Analyze and close code, functional, and assertion coverage gaps
Execute regressions, debug failures, and provide actionable solutions
Work closely with architects, designers, and cross‑functional teams to ensure design quality
Coordinate with customer teams and drive verification deliverables to closure
Serve as the primary project verification point‑of‑contact, supporting sign‑off activities
Apply / Refer : mohini.tyagi@eximietas.design
Seniority level : Mid‑Senior level
Job function : Engineering and Consulting
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Design Verification Engineer • San Francisco, California, United States