CAD Engineer

Job Description

Job Description

CAD Engineer

The ASIC / SOC CAD Engineer will take full ownership of the company’s ASIC design environment and compute infrastructure. This candidate will be responsible for maintaining the CAD / EDA flow and infrastructure, supporting the design teams in producing best in class silicon for AI processing applications across compute, memory management, high-speed connectivity, and other key technologies in advanced, leading-edge process nodes. The ASIC / SOC CAD engineer will also manage PDK installation / management / modification, foundry relationship, tapeout flows, CAD tool license management, tool installation and updates, custom scripting, and design environment management.

Responsibilities :

Evaluate, select, and deploy EDA tools and methodologies to produce best-in-class Performance-Power-Area results

Manage / monitor CAD tool licenses, compute server, and storage usage, optimizing for efficiency and cost

Handle PDK and standard cell installation, management, and modification.

Develop and maintain  automated flows for improving the SoC design process

Develop, enhance, and maintain analog, mixed signal, and digital front and back-end flows.

Generate mixed signal / Analog .lib and SystemVerilog views

Debug verification issues (LVS / DRC / ERC / PEX / EM -I) for both digital ana analog environments and work with designers in resolving them.

Interface and manage relationship with internal / external IT support vendors, Server co-location vendors and CAD engineering vendors.

Work with EDA tool vendors to drive issues and enhancements to closure

Develop, maintain, and enhance internal scripts and tools using Shell / Skill / Python / C.

Qualifications :

8+ years’ experience in CAD flow / environment management

Expertise developing / using industry-standard ASIC tools and methodologies for construction (e.g. partitioning, floorplanning, synthesis, place & route, clocking) and sign-off (equivalency, extraction, timing, power estimation, EMIR, physical verification)

Experience supporting custom ASIC design CAD tools (e.g. Cadence, Synopsis, Mentor etc)

Familiarity with both digital and analog design flow revision control software (e.g. GIT, SOS)

In depth experience in Mixed Signal database and simulation environment using virtuoso

Experience with EDA license management, LSF and equivalent job schedulers, and cloud-based silicon development

Strong knowledge of PDK installation / management / modification.

Experience in foundry management and tapeout flows

Familiarity reading and writing Verilog or SystemVerilog

Strong proficiency in programming languages such as C / C++, Perl, Python, and TCL

Familiarity with Linux server architecture, configuration, administration, maintenance, and package management.

Familiarity with different operating systems (Redhat, Ubuntu, etc)

Experience with NFS / SMB file protocols and how they operate in Mac, Windows, and Linux environments.

Excellent problem-solving skills and attention to detail.

Great interpersonal and communication skills

Ability to work independently and collaboratively.

Experience with GPU drivers and GPU servers