ASIC Design Engineer
OMNIVISIONSanta Clara, Californiajob_description.job_card.30_days_ago
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job_description.job_card.job_descriptionBS in Electrical or Computer Engineering or related field or related experience, or MS in Electrical or Computer Engineering plus related experience 2+ years of ASIC design experience with knowledge of ASIC design flow, including hands-on experience in ASIC chip design and integration. Requires knowledge of Verilog, system Verilog, C or C++ languages, digital image processing and chip-level tape out procedure from initial PRD, design, verification, timing closure, FPGA emulation and ECO. Knowledge of display technology is a plus Knowledge of UVM is a plus Knowledge of DFT(Scan / MBIST / Functional Pattern) is a plus
Description
Responsibilities :
- Design and implement module level micro-architecture
- Participate in top-level implementation and integration
- Participate in both top level and module level RTL coding, simulation, synthesis and timing closure
- Generate test cases for the module level and chip level.
- Participate in FPGA emulation and post-silicon validation.
- Write design specification
Requirements :
Annual base salary for this role in California, US is expected to be between $120,000 - $145,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.
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Asic Design Engineer • Santa Clara, California