Senior Physical Design Engineer(7051)

Senior Physical Design Engineer (7051) – TSMC

Join to apply for the

Senior Physical Design Engineer(7051)

role at

TSMC .

Overview of Role

As a Senior Physical Design Engineer, you will be responsible for the physical design implementation PnR run, Performance / Power / Area (PPA) comparison, congestion & DRC analysis, and design optimization. You may also do synthesis, debugging & data analysis, scripting, STA or timing analysis. Report to the Manager of Advanced Chip implementation team at its San Jose Design Center, California. Hybrid work schedule with 4 days in office.

Responsibilities

Responsible for the physical implementation on TSMC’s most advanced process nodes.

Netlist-to-GDS flow including block / SOC‑level placement, clock tree synthesis, routing, and design optimization.

Evaluate flow and methodologies to optimize power, performance, and area (PPA).

Analyze standard cell library utilization and route congestion data.

CAD development including customizing design flows and creating comparison tables using scripting languages such as TCL, Python, Perl and Shell.

Minimum Qualifications

Master’s degree in Electrical Engineering or Computer Science with a minimum of 4 years of relevant industry experience.

In-depth knowledge of hardware design courses including VLSI design, digital integrated circuits, logic design, design for testing, computer architecture, and digital design automation.

Knowledge of physical design implementation flows, auto placement and routing (APR), static timing analysis (STA), layout design, physical design verification (PDV), IREM signoff, and CAD development.

Experiences in research projects or internship related to RTL coding, synthesis, digital design and testing, physical implementation or design verification.

In-depth knowledge of major EDA tools / design flows.

Experience in Python, Perl, TCL language programming and CSH script.

Ability to work regularly at a customer site in the South Bay area.

Preferred Qualifications

Ability to independently complete Netlist‑GDS P&R.

Excellent communication skills and strong problem‑solving skills.

Positive, active, collaborative, self‑motivated, adaptable and flexible.

Experience with TSMC N16 and below technology.

Experience in software programming is a plus.

Company Description

TSMC is a trusted technology and capacity provider, the world’s leading dedicated semiconductor foundry and technology leader with a strong reputation for manufacturing excellence. TSMC supports a thriving ecosystem of global customers and partners, delivering cutting‑edge technologies and design enablement solutions.

Diversity Statement

TSMC Technology, Inc. is committed to employing a diverse workforce and provides Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, or any other characteristic protected by applicable law. TSMC is an equal opportunity employer that prizes diversity and inclusion. We are committed to treating all employees and applicants for employment with respect and dignity. If you require reasonable accommodation due to a disability during the application or recruiting process, please notify us at G_Accommodations@tsmc.com.

Pay Transparency Statement

At TSMC, your base pay is only part of your overall total compensation package. At the time of posting, this role typically pays a base salary between $108,000 / yr and $167,500 / yr. The actual pay may vary based on individual qualifications, experience and location. TSMC’s total compensation package includes market‑competitive pay, allowances, bonuses and comprehensive benefits.

Seniority Level

Mid‑Senior level

Employment Type

Full‑time

Job Function

Engineering and Information Technology – Semiconductor Manufacturing

#J-18808-Ljbffr