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Sr. Analog Mixed-Signal Design Engineer
Sr. Analog Mixed-Signal Design EngineerCypress HCM • San Jose, CA, United States
Sr. Analog Mixed-Signal Design Engineer

Sr. Analog Mixed-Signal Design Engineer

Cypress HCM • San Jose, CA, United States
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Sr. Analog / Mixed-Signal Design Engineer

This exciting role will be responsible for circuit design and implementation at the chip or block level, developing high-performance analog and mixed-signal components such as transmitters, receivers, PLLs, DLLs, ADCs, and DACs. The role involves circuit simulation, layout collaboration, behavioral modeling, and silicon validation. The company is a silicon IP provider for the semiconductor manufacturing industry. This position can be based in San Jose, CA or Atlanta, GA.

Responsibilities :

  • Own and implement analog / mixed‑signal designs at the chip or block level to meet performance and timing goals.
  • Design, simulate, and characterize high‑speed circuits such as transmitters, receivers, PLLs, DLLs, ADCs, DACs, and LDOs.
  • Develop and validate circuit architectures, perform post‑layout verification, and document analysis results.
  • Collaborate with layout, lab, and system teams for silicon bring‑up, test planning, and characterization.
  • Create behavioral models for verification simulations and support pre‑silicon verification flows.

Qualifications :

  • MS or PhD in Electrical Engineering with 2+ years of CMOS analog / mixed‑signal design experience.
  • Hands‑on experience in one or more circuits : transmitters, receivers (CTLE, DFE), PLLs, DLLs, or clock distribution.
  • Strong understanding of analog fundamentals, bias circuits, op‑amps, and design tradeoffs.
  • Experience with DDR4 / 5 or PCIe interface design preferred.
  • Familiarity with FinFET and digitally assisted design a plus.
  • Skilled in modeling with MATLAB, Verilog‑A, or Verilog.
  • Strong communication and teamwork abilities in a cross‑functional R&D environment.
  • Salary Range :

    $115,000.00 – $208,000.00 per year, depending on experience and location.

    Weekly Schedule :

    Hybrid schedule (3 days onsite and 2 days remote), based in either San Jose, CA or Johns Creek, GA.

    Seniority Level : Mid‑Senior level.

    Employment Type : Full‑time.

    Job Function :

    Quality Assurance, Engineering, and Manufacturing.

    Benefits :

  • Medical insurance
  • Vision insurance
  • 401(k)
  • #J-18808-Ljbffr

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    Sr Design Engineer • San Jose, CA, United States

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