Staff / Sr. Staff Design Verification Engineer - QGOV

Company :

Qualcomm Technologies, Inc.

Job Area : Engineering Group >

ASICS Engineering

General Summary : Design Verification

Responsibilities :

• Familiarity with RTL design in Verilog and System Verilog
• Develop verification methodology, ensuring scalable and portable environment across simulation and emulation
• Develop test plan to verify Hardware building blocks, Design macros and Standard interfaces (PCIE, DDR, USB, I2C, SPI, etc)
• Own end to end DV tasks from coding Test bench and test cases, write assertions, running simulations and achieving all coverage goals
• Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches
• Develop and maintain emulation environment to collect metrics related to emulation environment

Location :

San Diego full time, 5 days a week

Security Clearance :

Must be a U.S. citizen and eligible to receive a U.S. Government security clearance

Required Qualifications :

Preferred Qualifications :

Minimum Qualifications :

Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.

OR Master’s degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.

OR PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Equal Opportunity Employment Statement :

Qualcomm is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected classification.

Pay Range :

$164,000.00 - $246,000.00

Benefits :

Please contact Qualcomm Careers for more information.

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