Job Description
Job Description
Life is Short. Solve Hard Problems with Cool People.
Idaho Scientific is the Goldilocks of the spirit and growth of a startup, with a financial footing and safety of a stable corporation. The perks of working at Idaho Scientific include all the benefits you’d expect from an employer who prioritizes a balanced human experience :
- Competitive Pay
- Flexible Work Schedule
- Health Benefits and Insurance
- Retirement fund contributions
- Profit Sharing
- Generous Paid Time Off Policy
Solve the Problem, Not the Symptom.
Idaho Scientific designs and deploys secure system solutions through novel CPU design, crypto cores, purpose-built system-on-a-chip architectures and hardened operating systems. Our solutions are the foundation for how military systems will remain safe and secure in the conflicts of the future. We need smart people like you to join us in solving hard problems that matter.
What You’ll Get to Do :
Collaborate with team leaders to explore and clearly identify real problems and solutions.Refine and improve the microarchitecture of Idaho Scientific IP to optimize performance, I / O, power consumption, area utilization, recurring cost and security functions.Implement and simulate IP blocks in RTL using SystemVerilog, VHDL, and other languages.Integrate complex systems that instantiate both Idaho Scientific and third party IP.Contribute to all aspects of design success from specification to production.Apply our state-of-the-art IP to ASIC and FPGA products in the real world.Use high-quality design methods and processes to achieve excellent results.Work with other top-notch ASIC design engineersRequired Qualifications & Experience
US Citizenship (no exceptions)Ability to get a security clearanceSolid technical understanding of FPGA or ASIC product developmentExperience with SystemVerilog, VHDL, and Test-Driven Development principlesAbility to communicate clearly in person and in written documentationDegree in Computer Engineering, Computer Science, Electrical Engineering or related fieldIn-depth knowledge and experience with digital architectures and design methods such as RTL coding, synthesis, place-and-route, timing closure, constrained-random and formal verificationStrong analytical and problem solving skillsExtreme attention to detailA willingness to roll up one’s sleeves to get the job doneSkilled at working effectively with cross functional teamsPreferred Qualifications & Experience
At least 3 years of experience in FPGA or ASIC product developmentUS Security Clearance, Active or current within the last two yearsPrior experience with FPGA emulation of complex RTLWorking knowledge of applied cryptography and cyber security topicsExperience applying principles of cyber security to operational technology and embedded systemLocation
The preferred work location is at Idaho Scientific headquarters in Boise, Idaho or in Salt Lake City, UtahCommitment to Diversity.
Idaho Scientific is an equal employment opportunity employer. Qualified applicants will not be discriminated against due to race, color, creed, sex, sexual orientation, gender identity or expression, age, religion, national origin, citizenship status, disability, ancestry, marital status, veteran status, medical condition including pregnancy, or any protected category prohibited by local, state or federal laws.
Powered by JazzHR
DJACsESc6Q
