Design Verification Engineer

Design Verification Engineer

We are seeking a Design Verification Engineer. The role is technical, hands-on, in charge of the verification environment for new silicon projects and developments. We are looking for an experienced professional with Passion & Drive to succeed.

Necessary Qualifications :

• BS or MS in Computer Science or Electrical Engineering.
• 5-10+ years of industry experience bringing silicon ICs into high volume production.
• Must have strong experience with UVM.
• Must have a full chip verification experience.
• Experience of leading a single project.
• Knowledge of industry standard interfaces. Extensive Familiarity with Verilog, Simulation tools & demonstrated ability to debug Problems & Troubleshoot in Real Time.
• Sound knowledge of ARMv8, interconnect, memory coherence and memory architectures.
• Familiarity with Formality & most popular Verification Tools.
• Expertise in writing Perl / Python , awk, sed & Common Scripts to automate the Verification Tasks for CPU plus all Chip peripherals USB, PCIe, MIPI, SDIO, PCI E & DDR Controllers.
• Advanced knowledge of ASIC design and verification flow including RTL design, simulation, test bench development, regression, equivalence checking, timing analysis, scan insertion and test pattern generation.
• Experience with low-level programming of systems in C / C++.
• Experienced in writing scripts in languages such as Perl, Python, and Tcl.
• Functional understanding of constrained random verification process, functional coverage, and code coverage.
• Low power verification UPF.
• Team player with excellent communication skills and the desire to take on diverse challenges.
• Customer interaction.

Other Qualifications :

Compensation : $140,000.00 - $150,000.00 per year.