Basic Qualifications
Bachelor’s degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 5 years of relevant experience; or Master's degree plus a minimum of 3 years of relevant experience.
Clearance Requirements :
Department of Defense TS / SCI security clearance is preferred at time of hire. Candidates must be able to obtain a TS / SCI clearance within a reasonable amount of time from date of hire. Applicants selected will be subject to a Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, citizenship is required.
Responsibilities for this Position
Duties and Tasks :
- Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and / or FPGA (Field Programmable Gate Array) developments
- Determines architecture, system simulation and detailed design approach
- Defines module interfaces and all aspects of device design and simulation
- Evaluates the process flow including but not limited to high level design, synthesis, place and route, timing and power utilization
- Creates test and simulation plans that establish functional criteria
- Verifies test results and analyzes performance
- May also review vendor capabilities, foundry technologies, device libraries and simulation tools
- Participates in the improvement of the ASIC / FPGA organizational processes
- Supports the generation of technical engineering products by using the appropriate standards, processes, procedures, and tools throughout the ASIC / FPGA development life cycle
- Contributes to the research and analysis of data, such as customer design proposal specifications, and manuals to determine feasibility of design or application
- Selects components and equipment based on analysis of specifications and reliability
- May provide leadership and / or direction to lower level employees
- Independently determines approach to solutions
- Contributes to the completion of major programs and projects
- Plans and executes project tasks for activities described above
Knowledge, Skills and Abilities :
Proficient use and understanding of ASIC / FPGA engineering concepts, principles, and theoriesProficient in the principles and techniques of ASIC / FPGA designProficient understanding of ASIC / FPGA processesProficient knowledge of other related disciplinesKeeps abreast of technology trendsProficient awareness of business objectives and Engineering’s role in achievingProficient in Microsoft Office applicationsProficient in ASIC / FPGA design toolsProficient written and verbal communications skillsAbility to think creativelyAbility to multi-taskProficient skill in communicating issues, impacts, and corrective actionsProficient ability to recognize and clearly report information relevant to sound ASIC / FPGA designProficient ability to develop and sell concepts and ideasRegular contact with senior levels of internal work groupsWorks under limited directionContact with project leaders and other professionals within the Engineering department and with project teams across the companySome contact with external customersKey Responsibilities :
The individual will be responsible for and participate in the ASIC / FPGA product life cycle (requirements, design, implementation, and test). Must be knowledgeable in VHDL and / or Verilog RTL coding and be proficient in micro-architecture design. Successful candidates will have an understanding of digital design concepts and proficient in the digital design tool flow (synthesis, timing, place and route, and in system debug).
This candidate must have an ability to operate in a team environment and collaborate across the different teams as required to accomplish the design goals. Must have strong written and oral communication skills.
Basic Qualifications for Adv ASIC / FPGA Design Engineer :
Ability to generate micro architecture and detailed design approachesProficient in async design principals, timing closure, and constraint generationProficiency in HDL (VHDL / Verilog)Proficiency in scripting languages such as Tcl, Python, or PerlEffective communication, presentation skills, and high proficiency in technical problem solvingcitizenship with the ability to obtain and maintain a Secret security clearancePreferred Qualifications :
Leads technical tasks or small projectsUnderstanding of high reliability design principalsExperience with Xilinx and Microchip FPGAs along with associated tools (ISE, Vivado, Libero)Experience with synthesis tools (Precision, Synplify)Experience with verification tools (QuestaSim / UVM)Experience with clock-domain-crossing tools (Questa CDC)Experience with lab bring-up and debug (Oscilloscope, Logic Analyzer, ChipScope)Active DoD Secret Clearance or higherWorkplace Options :
This position is fully on-site or hybrid / flex, as mutually agreed.
While on-site, you will be a part of the Scottsdale, AZ team. Learn more at
Key Words : Verification, ASIC, FPGA, SystemVerilog, Verilog, Assertions (SVA), OVM, UVM, Digital Signal Processing (DSP), functional coverage, constrained random, formal verification, constrained random testing
LI-Hybrid
Target salary range : USD $119, - USD $132,;This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled.