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ASIC Verification Engineer - UVM, Formal & FPGA
ASIC Verification Engineer - UVM, Formal & FPGAAmazon • San Francisco, California, United States
ASIC Verification Engineer - UVM, Formal & FPGA

ASIC Verification Engineer - UVM, Formal & FPGA

Amazon • San Francisco, California, United States
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A leading technology company in San Francisco is seeking a Verification Engineer to implement state-of-the-art verification environments for communications via Low Earth Orbit satellites. Candidates must have a Bachelor's degree in Electrical Engineering or Computer Science and at least 3 years of experience in verification systems. Competitive compensation package based on experience and market rates.

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Fpga Verification Engineer • San Francisco, California, United States

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