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Silicon Validation Engineer
Silicon Validation EngineerKasmo Global • San Francisco, CA, United States
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Silicon Validation Engineer

Silicon Validation Engineer

Kasmo Global • San Francisco, CA, United States
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Silicon Validation Engineer

Location : CA

Contract

Experience in bring up and debug of high speed and high power SoCs.

  • Experience in silicon validation planning and leading a project from pre silicon planning, bring up, full SoC validation, and characterization to providing validation signoff before HVM.
  • Comprehensive knowledge of Embedded software programming
  • Proficient in programming languages such as C, C++, Python, TCL and Shell scripts
  • Strong protocol knowledge in I2 / I3C, SPI, UART, JTAG, and PCIe
  • Strong understanding of FPGA programming
  • Proficient in High Speed SerDes testing
  • Proficient in TCP IP, UDP, IPv4, IPv6 addressing, Ethernet, DHCP, and DNS
  • Hands on experience with high speed oscilloscopes and debugging embedded systems using logical analyzers
  • Basic understanding of how LLMs work
  • Some experience with DFT (Design For Test)
  • Experience in automation framework development using Python or any other language
  • Good knowledge of ASIC design flow and silicon FW development process
  • Flexible to adapt to a very dynamic environment and always carrying forward key improvements
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Validation Engineer • San Francisco, CA, United States

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