Hardware Engineer Mid-Onsite role from day 1 at Plymouth, MN

Role : Contract Hardware Engineer Mid

Location : Onsite role from day 1 at Plymouth, MN

Experience range - 5 to 14 years

Job Description :

What candidate will Be Doing :

Key Responsibilities :

Lead the development of custom radiation-hardened DDR3 IP, controller, and PHY.

Serve as a point of contact for internal and external DDR IP development-related activities.

Provide technical leadership and guidance to internal and external development teams.

Ensure compliance with DDR3 requirements and specifications.

Maintain deep knowledge of DDR protocols, including DMI, and apply this knowledge in development.

Oversee work on logic design, Clock Domain Crossing (CDC) solutions, and voltage plane optimization.

Oversee verification processes for DDR IP development

He / She will be using following tools and must possess below experience of tools

• RTL Compiler
• Design Compiler
• ASIC synthesis tools like DC, Genus
• FPGA tool platform
• CDC tools

What we are looking for :

Experience in DDR IP development

Familiarity with logic design, CDC solutions, and voltage plane optimization.

Familiarity with verification concepts in DDR IP development.

Familiarity with analog circuit development, with a focus on IO circuitry and PHY development.

Strategic awareness of the competitive landscape for DDR IP.

Excellent communication and teamwork skills.

Bachelor's or higher degree in Electrical Engineering, Computer Science, or a related field.

US Citizenship is required with no known barriers to achieve a USG Secret security (no dual citizenships)

Ability to work from Plymouth, MN or Deer Valley, AZ It is also expecting that candidate should possess below skills.

Radiation effects analysis knowledge / experience

Advanced node and SOI technology design experience

Knowledge of OS Linux, scripting languages – ., Perl, Shell, TCL

Laboratory experience (hardware configuration, measurement systems)

Keywords :

Education : Bachelors of engineering

Required Skills :

ASIC

LINUX

FPGA

PERL

LABORATORY

Additional Skills :

TCL

LOGIC DESIGN

SCRIPTING

APPLICATION-SPECIFIC INTEGRATED CIRCUIT

FIELD PROGRAMMABLE GATE ARRAY

ANALOG CIRCUIT

TECHNICAL LEADERSHIP

CIRCUITRY

RTL DESIGN

ELECTRICAL ENGINEERING