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Sr. Failure Analysis Engineer
Sr. Failure Analysis EngineerThe Fountain Group • Santa Clara, CA
Sr. Failure Analysis Engineer

Sr. Failure Analysis Engineer

The Fountain Group • Santa Clara, CA
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The Fountain Group. We are a national staffing firm and are currently seeking an ­­­­­ Sr. Failure Analysis Engineer for a prominent client of ours. This position is located in Santa Clara, CA.  Details for the position are as follows :

Job Description :

  • Pay : $46.30hr – (W2).
  • Shift hours : (1st shift) : 8 : 00am to 4 : 30pm - Monday through Friday (Onsite).
  • 12 month assignment – possibility to extend or convert based off performance and budget.
  • Drive returned product Failure Analysis, characterizing failures, and escalating issues and trends to the Hardware Quality Engineering team
  • Resolve escalated RMA's by determining the hardware root cause of the failure issue.
  • Track and report on RMA failure trends by product and cause to the Tech Op's team.
  • Track the progress of all in-progress RMA's requiring FA and prioritizing accordingly.
  • Monitor process and product corrective actions to ensure changes were in fact effective in improving the product.
  • Maintain accurate data entry into SAP and Salesforce database tools.

Qualifications :

  • Education : Minimum BSEE, BSCS, BSCE, or BSET required. 10+ years related experience required in the computer networking industry.
  • Expert technical skills in the manufacturing test environment, both PCBA and box build / system level assemblies.
  • Strong Linux system administration knowledge.
  • Outstanding communication skills, both written and verbal.
  • A highly collaborative working style is a must.
  • Moderate to fluent in programming languages and tools used for the test environment (Linux OS, Tcl, Expect, Shell Script, Python, Network Switch, Terminal Server, and PDU)
  • Ability to apply a working knowledge of server / client and IP based networking hardware architecture, both system and component level, to the test environment.
  • Demonstrated ability at hardware debugging to component level and fault isolation is mandatory.
  • Familiarity with test engineering principles, methods and industry standard "best practices” in a manufacturing test environment including JTAG, boundary scan, 2-corner and 4-corner testing.
  • Knowledge of Salesforce, JIRA and SAP desired.
  • Ability to read schematics and view board files (Allegro Viewer and Cadence PCB Design).
  • System administration required.
  • Read schematics required.
  • Networking required.
  • PCBA required.
  • LINUX required.
  • Additional

  • PYTHON
  • JTAG
  • CADENCE
  • Network switch
  • JIRA
  • SALESFORCE
  • PCB design
  • Test engineering
  • Accurate data entry
  • Failure analysis engineer
  • Failure analysis
  • Outstanding communication
  • Terminal server
  • Database
  • System level
  • Excellent written and verbal communication skills
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