Fpga design engineer serp_jobs.h1.location_city

When you join Honeywell, you become a member of our global team of thinkers, innovators, dreamers, and doers who make the things that make the future. That means changing the way we fly, fueling jets in an eco-friendly way, keeping buildings smart and safe, and even making it possible to breathe on Mars. Working at Honeywell is not just about developing cool things. That is why all our employees enjoy access to dynamic career opportunities across different fields and industries.

Pilots all over the world rely heavily on FPGA-powered displays during flights. The FPGA, a high-speed processing unit, provides real-time data on the aircraft’s status, including altitude, speed, and heading. It also processes radar data to highlight areas of turbulence and uses GPS data to map the optimal approach paths to destinations. This real-time, clear, and easy-to-understand information is crucial in helping pilots make informed decisions, ensuring safe and efficient flights.

Honeywell Aerospace, a global leader in avionics, engines, systems, and service solutions, is seeking an experienced and passionate FPGA Design Engineer to join our dynamic team in Phoenix, AZ – Deer Valley location. This is an exciting opportunity to contribute to the future of aerospace technology and work on groundbreaking projects that will shape the industry.

KEY RESPONSIBILITIES

• Develop and optimize high-performance digital circuits and systems using Very High-Speed Integrated Circuit Hardware Description Language (VHDL) or Verilog while adhering to industry best practices and design methodologies.
• Conduct thorough functional and performance verification of FPGA designs through simulation and hardware testing, identifying and resolving any design issues or bottlenecks.
• Utilize advanced tools and techniques for FPGA implementation, including synthesis, place and route, and timing analysis to achieve optimal performance, power, and area trade-offs.
• Develop and implement verification plans for FPGA designs.
• Utilize UVM methodology to create component and top-level test benches and verify RTL designs.
• Collaborate with design engineers to identify and resolve design issues.
• Perform code coverage analysis and drive closure of coverage metrics.
• Participate in requirements and verification reviews to ensure high-quality deliverables.

YOU MUST HAVE

WE VALUE

The annual base salary range for this position is $120,000-$180,000. Please note that this salary information serves as a general guideline. Honeywell considers various factors when extending an offer, including but not limited to the scope and responsibilities of the position, the candidate’s work experience, education and training, key skills, as well as market and business considerations.

In addition to a competitive salary, leading-edge work, and developing solutions side-by-side with dedicated experts in their fields, Honeywell employees are eligible for a comprehensive benefits package. This package includes employer subsidized Medical, Dental, Vision, and Life Insurance; Short-Term and Long-Term Disability; 401(k) match, Flexible Spending Accounts, Health Savings Accounts, EAP, and Educational Assistance; Parental Leave, Paid Time Off (for vacation, personal business, sick time, and parental leave), and 12 Paid Holidays. For more information visit : Benefits at Honeywell

The application period for the job is estimated to be 40 days from the job posting date; however, this may be shortened or extended depending on business needs and the availability of qualified candidates.

Due to compliance with . export control laws and regulations, candidate must be a . Person, which is defined as, a . citizen, a . permanent resident, or have protected status in the . under asylum or refugee status  or have the ability to obtain an export authorization.