Asic design engineer serp_jobs.h1.location_city

Job Title

Task one : Verification Planning task two : Implement SoC top level testbench (Suggested approach, subject to negotiation)

Additional Skills & Qualifications

Someone with experience verifying FPGA / ASICs Product : Global Space-Based Electronics For Human Based Or Satellite Systems, Sensors And Navigation Systems For Missiles And Interceptors, And A Range Of Aviation Safety, Cockpit, Engine Control, And Connectivity Products And Services. Will Be Responsible For Coding, Running Simulations, Synthesis, Creating Test Benches, And Preparation Of Documentation. FPGA / ASIC Verification Using Universal Verification Methodology (UVM). Developing Verification Testbench Architecture & Design, Verification Test Cases, Simulation Testbench Coding, Testbench Procedures And Tracing, Simulation Analysis, And Verification Results Documentation. Must Have : Bachelor's Degree In Electrical Or Computer Engineering US Citizenship Only - No Dual Citizenship Allowed Due To Contractual Requirements

Experience Level

Expert Level

Pay and Benefits

The pay range for this position is $65.00 - $100.00 / hr.

Eligibility requirements apply to some benefits and may depend on your job classification and length of employment. Benefits are subject to change and may be subject to specific elections, plan, or program terms. If eligible, the benefits available for this temporary role may include the following :

• Medical, dental & vision
• Critical Illness, Accident, and Hospital
• 401(k) Retirement Plan Pre-tax and Roth post-tax contributions available
• Life Insurance (Voluntary Life & AD&D for the employee and dependents)
• Short and long-term disability
• Health Spending Account (HSA)
• Transportation benefits
• Employee Assistance Program
• Time Off / Leave (PTO, Vacation or Sick Leave)

Workplace Type

This is a hybrid position in Minneapolis, MN.

Application Deadline

This position is anticipated to close on Aug 31, 2025.