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Asic design engineer • san jose ca
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ASIC Engineer, Design Verification.Meta is hiring an ASIC Design Verification Engineer within the Infrastructure organization.
We are looking for individuals with experience in Design Verification t...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
Ready to make connectivity from space universally accessible, secure and actionable? Then you've come to the right place!.
E-Space is bridging Earth and space to enable hyper-scaled deployments of I...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_30
These inference systems offer significant performance and efficiency gains over traditional GPU-based systems, delivering advantages in both performance per dollar and performance per watt.Positron...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
Design and implement module level micro-architecture.Participate in top-level implementation and integration.Participate in both top level and module level RTL coding, simulation, synthesis and tim...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_30
ASIC Design Verification Engineer, Technical Leader.The application window has been extended and is expected to close on 8 / 30 / 2025.
This is an onsite role and will require working out of the Milpita...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
If you are a first time user, please create your candidate login account before you apply for a job.If you already have a Candidate Account, please Sign-In before you apply.We are looking for brigh...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_30
We are seeking a highly skilled and motivated ASIC Design Verification Engineer with over 6 years of experience in the field of verification.
As an Individual Contributor, he / she will play a crucial...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_30
Being a member of design team who oversees fullchip STA / SDCs and works with physical design and DFT teams to close fullchip timing in multiple timing modes.
Option to also do block level RTL design...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_30
At Synopsys, we drive the innovations that shape the way we live and connect.Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines.We lead in c...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
Front-End ASIC Design Engineer - Milpitas, CA Unique opportunity to join an established international company in their US expansion.
Working from the US headquarters, you will have the ability to b...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
ASIC Design Verification Engineer.Our client is building the first latency optimized SoC for their industry.Using its proven AI accelerator designs, we are targeting best in class latency with orde...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_30
The role : We are looking for an adaptive, self-motivative Design Verification Engineer to join our growing team.As a key contributor, you will be part of a leading team to drive and improve abiliti...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_hours
WHAT YOU DO AT AMD CHANGES EVERYTHING.We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world.
Our mission is to build great products that ...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world.
Our mission is to build great products that ...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's.This position offers the opportunity to have real impact in a multifaceted, technology-focused company impac...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
R&D) efforts, affecting technology across military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned fl...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_30
Santa Clara, California, United States Hardware.The ideal candidate will have experience in ASIC design with : - Architecture research and / or development of memory or highly interconnected system arc...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
Front-End Asic Design Engineer Milpitas, Ca.Responsibilities Include But Are Not Limited To : .Ensure designs meet product performance-power-area-schedule requirements.
Tasks may include architecture / ...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
ASIC Design & Integration Engineer.Come join Apple's growing wireless silicon development team.Our wireless SOC organization is responsible for all aspects of wireless silicon development.With a pa...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components.
Establish prototyping systems in the lab and cont...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_30
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ASIC Engineer, Design Verification
Meta PlatformsSunnyvale, CA, USjob_description.job_card.variable_days_ago
serp_jobs.job_preview.job_type
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job_description.job_card.job_descriptionCurrently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta 3+ years of hands-on experience in SystemVerilog / UVM methodology or C / C++ based verification 3+ years experience in block / IP / sub-system and / or SoC level verification based on SystemVerilog UVM / OVM based methodologies Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience Track record of 'first-pass success' in Application-Specific Integrated Circuit (ASIC) development cycles Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle Experience in development of Universal Verification Methodology (UVM) based verification environments from scratch Experience with Design verification of Data-center applications like Video, Artificial Intelligence / Machine Learning (AI / ML) and Networking designs Experience with revision control systems like Mercurial(Hg), Git or SVN Experience with verification of Advanced RISC Machines / Reduced Instruction Set Computing Five (ARM / RISC-V) based sub-systems or System-on-Chip (SoCs) Experience with IP or integration verification of high-speed interfaces like Peripheral Component Interconnect Express (PCIe), Double Data Rate (DDR), Ethernet
ASIC Engineer, Design Verification
Meta is hiring an ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications. As a Design Verification Engineer, you will be part of a team working with the best in the industry, focused on developing cutting-edge ASIC solutions for Meta's data center applications. You will be responsible for the verification closure of a design module or sub-system from test-planning, UVM based test bench development to verification closure. Along with traditional simulation, you will be using other approaches like Formal and Emulation to achieve a bug-free design. The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success.
Responsibilities
- Define and implement block / IP / System on Chip (SoC) verification plans, build verification test benches to enable block / IP / sub-system / SoC level verification
- Develop functional tests based on verification test plan
- Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage
- Debug, root-cause and resolve functional failures in the design, partnering with the Design team
- Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality
Minimum Qualifications
Preferred Qualifications
114,000 / year to $166,000 / year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.
Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other applicable legally protected characteristics. You may view our Equal Employment Opportunity notice here.
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