Verification engineer serp_jobs.h1.location_city

Top Secret / SCI Engineering - Systems Position

Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 8 years of relevant experience; or Master's degree plus a minimum of 6 years of relevant experience. Clearance requirements : Department of Defense TS / SCI security clearance is preferred at time of hire. Candidates must be able to obtain a TS / SCI clearance within a reasonable amount of time from date of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.

Primary job qualifications : We encourage you to apply if you have any of these preferred skills or experiences :

• In-depth experience using RTL simulation tools such as Siemens Mentor Graphics Questa or Modelsim tools or equivalent in a Linux Environment
• In-depth knowledge of System Verilog object oriented programming and the Universal Verification Methodology (UVM)
• Understands UVM Testbench Architectures
• Comfortable using and developing UVM agents, bus functional models
• Understands different types of coverage, usage of cover classes, cover points, etc
• Experience with predictive testbench components, functional coverage and assertions
• Experience with constrained random testing
• Experience with the Register Abstraction Layer
• Familiarity with requirements-based verification, requirement tracing, and developing requirement verification strategies etc
• Experience with scripting languages such as Linus shell scripts, TCL, Python
• Familiarity with using Formal Verification tools, code coverage, writing waivers etc
• Familiarity with the following are also helpful :
• Questa Verification IP (QVIP)
• Developing UVM testbenches for designs implemented in Xilinx devices with Xilinx IP and SoCs
• AXI protocols, PCIe, Space Wire, and Ethernet interfaces
• DSP functions and common signal processing components
• Familiar with debugging FPGA / ASIC hardware and assisting with HW / SW integration
• Continuous Integration features of GITLab

Duties and tasks :

General knowledge, skills and abilities :

Workplace options : This position is fully on-site or hybrid / flex, as mutually agreed. While on-site, you will be a part of the Scottsdale, AZ team.

Target salary range : USD $148,764.00 / Yr. - USD $165,035.00 / Yr. This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary.

Company overview : General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. Equal Opportunity Employer / Individuals with Disabilities / Protected Veterans.