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Verification engineer • san jose ca

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Engineer, Design Verification

Engineer, Design Verification

Analog DevicesSan Jose, CA, US
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Analog Devices Entry Level Hiring Program.NASDAQ : ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge.ADI combines ana...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
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Mixed-Signal Verification Engineer

Mixed-Signal Verification Engineer

Celestial AISanta Clara, CA, US
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As Generative AI continues to advance, the performance drivers for data center infrastructure are shifting from systems-on-chip (SOCs) to systems of chips. In the era of Accelerated Computing, data ...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
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Verification Engineer

Verification Engineer

CyberCodersSan Jose, CA, US
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We are a leader in memory computing with solutions in AI memory computations to reduce power needed in advanced AI systems. We are looking to grow our team with an Mixed-Signal Verification Engineer...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
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Design Verification Engineer

Design Verification Engineer

Zenex PartnersSan Jose, CA, US
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Location : San Jose, CA Duration : 12 Months Pay rate : $80-$100 / hr W2.serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
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PGA Verification Engineer

PGA Verification Engineer

Cynet SystemsSanta Clara, CA, US
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Develop and execute comprehensive verification plans for FPGA designs.Create and maintain test benches using industry-standard verification methodologies (e. Write and debug test cases to verify fun...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_1_day
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Formal Verification Application Engineer

Formal Verification Application Engineer

SynopsysSunnyvale, CA, US
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Formal Verification Application Engineer.At Synopsys, we drive the innovations that shape the way we live and connect.Our technology is central to the Era of Pervasive Intelligence, from self-drivi...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
Senior Verification Engineer

Senior Verification Engineer

AeonsemiSanta Clara, CA, United States
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ENGINEER Santa Clara-based Aeonsemi seeks a sr.serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
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Emulation Verification Engineer

Emulation Verification Engineer

AppleSunnyvale, CA, US
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Emulation Verification Engineer.Would you like to join Apple's growing wireless silicon development team? Our wireless SOC organization is responsible for all aspects of wireless silicon developmen...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
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Design Verification Engineer

Design Verification Engineer

Diverse LynxSunnyvale, CA, US
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Design Verification Engineer Salary for fulltime role : Location Sunnyvale CA or Austin Texas (working from Meta office) Key Responsibilities : Strong understanding of SV and UVM and good debugging ...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
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Verification Engineer

Verification Engineer

NatcastSunnyvale, CA, US
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Natcast (short for The National Center for the Advancement of Semiconductor Technology) is a new, purpose-built, non-profit entity created to operate the National Semiconductor Technology Center (N...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
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Verification Engineer

Verification Engineer

ACL DigitalSanta Clara, CA, US
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Job Description : We need someone familiar with UVM to run and debug tests.If they are capable, we will also ask them to write some testbench modules and components. Perhaps the most important thing ...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
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Design Verification Engineer

Design Verification Engineer

Millennium Software and Staffing IncSunnyvale, CA, United States
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Looking for Design Verification Engineer.serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
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Software Engineer, Physical Verification

Software Engineer, Physical Verification

CadenceSan Jose, CA, US
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At Cadence, We Hire And Develop Leaders And Innovators Who Want To Make An Impact On The World Of Technology.Works in R&D group to develop leading edge software for physical verification products a...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
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Silicon Design Verification Engineer

Silicon Design Verification Engineer

Initio CapitalSanta Clara, CA, US
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Hybrid – Santa Clara, CA or Austin, TX.K–$250K + Competitive Equity.Backed by top-tier investors and built around a seasoned team from Apple, Intel, and Nvidia, this company is designin...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
System Verification Software Engineer

System Verification Software Engineer

WayveSunnyvale, California, United States
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At Wayve we're committed to creating a diverse, fair and respectful culture that is inclusive of everyone based on their unique skills and perspectives, and regardless of sex, race, religion or bel...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
Design Verification Engineer

Design Verification Engineer

ProtingentSan Jose, CA, US
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Developing and Implementing Verification Plans.Building Testbenches using Universal Verification Methodology(UVM).Writing Test cases with both constrained-random and directed test cases to thorough...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
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Design Verification Engineer

Design Verification Engineer

EtchedSan Jose, CA, US
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Etched is building the hardware for superintelligence.GPUs and TPUs are flexible AI chips that can run many kinds of models : CNNs, RNNs, LSTMs, and more. But today, almost all AI workloads, from Cha...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
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Digital Design Verification Engineer

Digital Design Verification Engineer

PhizenixSanta Clara, CA, US
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Demonstrated success in taking products to high-volume production, ideally achieving first-pass silicon.Strong proficiency in SystemVerilog, UVM, C, and SystemC, along with solid scripting expertis...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
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Design Verification Engineer

Design Verification Engineer

Meta PlatformsSunnyvale, CA, US
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Meta's Reality Labs (RL) focuses on delivering Meta's vision through Augmented Reality (AR).Compute power requirements of Augmented Reality require custom silicon. Meta RL Silicon team is driving th...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
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Design Verification Engineer

Design Verification Engineer

DBSI ServicesMilpitas, CA, US
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We are seeking a Design Verification Engineer.The role is technical, hands-on, in charge of the verification environment for new silicon projects and developments. We are looking for an experienced ...serp_jobs.internal_linking.show_moreserp_jobs.last_updated.last_updated_variable_days
Engineer, Design Verification

Engineer, Design Verification

Analog DevicesSan Jose, CA, US
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Analog Devices Entry Level Hiring Program

Analog Devices, Inc. (NASDAQ : ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible.

Job Description Summary

Analog Devices is committed to investing in our people and their growth. One way we can do this is by establishing a cutting-edge Entry Level Hiring program. This program features high impact professional development, opportunities to drive meaningful projects that are directly tied to business goals, and unique executive exposure. Our duty is to develop the next generation of talent in our communities and provide them with a pathway to apply their academic skills in the real-world. At ADI, our early career hires will learn from the brightest minds who are dedicated to their growth, development, and success. From an industry perspective, incoming new career hires are surrounded by employees that represent the best of the best minds in their respective fields. Apply now for the opportunity to grow your career and help innovate ahead of what's possible! The Communications & Cloud team is seeking a motivated design engineer to provide support to our Cloud Power BU located at ADI's San Jose, CA, USA. As an individual contributor, the candidate will be working closely with a group of about 10 engineers. The project provides unique learning opportunities related to advanced mixed signal design verification techniques.

Responsibilities Include, But Not Limited To :

  • Verification of mixed signal designs and sub-systems using leading edge verification methodologies.
  • Contribute and influence the decisions on methodologies to be adopted for the verification.
  • Define testplans, tests and verification methodology for block / chip-level verification. Work with the design team in generating test-plans and closure of code and functional coverage.
  • Continuous interaction with analog and digital teams in enabling top-level chip verification.
  • Support post-silicon verification activities of the products working with design, product evaluation, and applications engineering team.

Minimum Qualifications

  • Bachelor's or Master's degree in Electrical or Computer Engineering
  • 2+ years of hands-on experience in SystemVerilog / UVM.
  • Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments.
  • Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle.
  • Preferred Qualifications

  • Experience in developing test benches using System Verilog and OVM / UVM
  • Knowledge of test-plan generation, coverage analysis, transaction level modeling, pseudo and constrained random techniques, assertion based and formal verification techniques with System Verilog
  • Experience of pre and post-silicon verification test flow and automated test benches
  • Familiarity with verification on multiphase DC-DC controllers
  • Experience with verification of ARM / RISC-V based sub-systems or SoCs.
  • Experience with verification of voltage interfaces like PMBUS, AVS, SVID, SVI3.
  • Experience with revision control systems like Perforce, Git etc.
  • Verilog, C / C++, System C, TCL / Perl / Python / shell-scripting
  • RTL design / front-end design experience
  • Experience with analog SV-RNM / EE-net modeling
  • Experience with formal verification methodology
  • Strong interpersonal, teamwork and communication skills are required.
  • Self-motivated and enthusiastic
  • For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and / or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) may have to go through an export licensing review process.

    Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

    EEO is the Law : Notice of Applicant Rights Under the Law

    The expected wage range for a new hire into this position is $82,080 to $112,860. Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors. This position qualifies for a discretionary performance-based bonus which is based on personal and company factors. This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.